Creonic GmbH, the leading provider of cutting-edge communications IP cores, proudly announces the release of its (inverse) Fast Fourier Transform (FFT/IFFT) IP core with Error Correction Code (ECC) memory support. Designed to meet the growing demand for efficient, error-tolerant signal processing solutions.
Creonic's Fast Fourier Transform uses the Cooley-Tukey algorithm internally. The new IP core produces transformed complex samples as output when operating on complex or real signal samples. The transform is executed by the core in a pipeline with logarithm 2 (transform length) stages, ensuring fast and accurate processing.
With many applications, including multi-carrier transmitter and receiver systems, spectrum analysis, signal filtering, and data compression, the FFT IP core is a versatile tool that can be used in various domains and segments. The ECC feature provides a competitive advantage for space applications where radiation tolerance is a stringent requirement.
Seamless integration is facilitated with AXI4-Stream handshaking interfaces. The core is compatible with Creonic's DVB-S2X/RCS2 Multi-Carrier receivers and can be used on Xilinx/AMD, Intel/Altera, or Microchip FPGAs and various ASIC technologies.
For more information on these updates and their benefits, please contact the sales team.
Creonic GmbH Introduces Fast Fourier Transform IP Core
12. April 2024 | Kaiserslautern